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18th January, 2020
 

Details of 3GPP Release 16 and introduction to 3GPP Release 17

3GPP Release 16 - also called as “5G Phase 2” - is focussed on improving the gaps in R15 and has key focus on industry verticals. The R16 specification will be completed in June 2020. The webinar presents details of this 3GPP Release. Also in addition there will be introduction to 3GPP Release 17.

 

10A H-Bridge motor driver with integrated current sensing and current sense output

The DRV8873 device is an integrated driver IC for driving a brushed DC motor in industrial applications. Two logic inputs control the H-bridge driver, which consists of four N-channel MOSFETs that drive motors bi-directionally with up to 10A peak current. The device operates from a single power supply and supports a wide input supply range from 4.5-38V.

 
 

#futurestartshere - embedded world 2020

Be a part of the embedded world Exhibition&Conference from 25th-27th February 2020 in Nuremberg, Germany. Discover innovation - extend networks - here you can already experience innovations before their official market introduction, because the embedded world is the international hotspot for everything connected with embedded systems for modern hard and software. Use the ticket code ew20ew to get your free ticket.

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Demonstration board uses eGaN FETS to develop ToF in automotive applications

Time of flight (ToF) relies on fast and accurate object detection. In automotive design, it is used in lidar systems for safety systems in advanced driver assisted systems (ADAS). Efficient Power Conversion (EPC) has released the EPC9144 demonstration board, equipped its EPC2216 eGaN FET to drive lasers with currents up to 28A with pulse widths as low as 1.2ns.

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Software means swift claim resolutions through increased connectivity

BluJay Solutions has announced that Aviva, the UK’s largest insurance company, has deployed BluJay’s MessageBroker EDI SaaS solution to power fast and agile data exchange. With over 33 million customers, Aviva processes thousands of updates and changes to insurance policies and records a day, resulting in millions of data transactions. The company decided to move from a legacy on-premise system to a flexible cloud-based solution.

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What are the hardware latencies associated with PRU?

In this application report from Texas Instruments, the hardware latencies associated with PRU-initiated memory reads are explored. The PRU is a scalar processor, processing each instruction sequentially. With the exception of memory read instructions, all PRU instructions execute in a single cycle.

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Tech Spotlight

DS89C386 Twelve Channel CMOS Differential Line Receiver

LMH1981 Multi-Format Video Sync Separator

UC2906 Linear Lead-Acid Battery Charger

TLC3548 14-bit, 5V, 200KSPS, 8-Channel Unipolar ADC

OP Amp Dual GP ±17V 8-Pin PDIP Rail

TLC6C5912-Q1 Automoitive Power Logic 12-Bit Shift Register LED Driver

USB Port Multimedia Load Switch Supports USB, UART, AUDIO, ID, MIC 25-DSBGA -40 to 85

MCU 16-bit MSP430 RISC 0.5KB Flash 2.5V/3.3V 14-Pin TSSOP T/R

SN65LVDS1 Single LVDS Transmitter

UCC28510 Advanced PFC/PWM Combination Controllers

Product Highlight